Welcome to the 2nd issue of the 2005 DVCon Bulletin.
This brief monthly email provides updates and insight into DVCon, the most important and influential conference for design and verification using hardware description languages. Sponsored by Accellera, the conference is in San Jose, California, February 14-16, 2005.

Highlights in this issue:
*DVCon Advance Program available
*Program Highlights & Exhibits
*Registration Open
*DVCon Trivia

DVCon Advance Program:
The Advance Program for DVCon 2005 is now available online. The conference includes valuable information for design and verification engineers. EDA professionals, university researchers and industry leaders. For the complete Advance Program online, please visit http://www.dvcon.org/techprog.html.

Program Highlights: Keynote information and sponsored tutorials:
Walden C. Rhines, CEO and Chairman of Mentor Graphics, Corp., will provide the keynote address for DVCon 2005. Mr. Rhines will address "Verification Discontinuities in the Nanometer Age" on Tuesday, February 15 at 8:30am in the Donner Ballroom. For more information regarding the keynote address, please visit http://www.dvcon.org/keynote.html.

In addition to the keynote, papers and panels, DVCon 2005 has four sponsored tutorials on Monday, February 14:

1). "SystemVerilog Assertions: Best Practices for Functional Verification: sponsored by Synopsys, Inc.

2). "Pragmatic ABV: Effective Assertion-Based Verification: sponsored by Cadence Design Systems, Inc.

3). "Transitioning to SystemVerilog for Verification": sponsored by Mentor Graphics Corp.

4). "Transaction-Level Modelling with the new OSCI SystemC TLM Standard": sponsored by Cadence Design Systems, Inc.
For more information regarding the tutorials, please visit http://www.dvcon.org/tutorials.html.

DVCon Exhibits: Join us Monday, February 14 from 4pm-7pm and Tuesday, February 15 from 9am-7pm
Exhibit only registration includes the exhibition and receptions on Monday and Tuesday evenings and access to the John Cooley Executives Panel at 4pm on Tuesday.

DVCon trivia question
What two groups joined, and in what year, to form Accellera? (Answer is at the bottom of the Bulletin)

Calling all Attendees - Registration is now open!
Full Conference, Student and One-day only registration fees include: Monday sponsored tutorials, Exhibits, Technical Sessions, Coffee Breaks, Tuesday and Wednesday luncheons and conference proceedings. For more information about registration, please visit http://www.dvcon.org/reg.html.

Trivia answer: Accellera was formed in 2000 through the unification of Open Verilog International and VHDL International.

DVCON 2005
5405 Spine Road STE 102
Boulder CO, 80301
(303) 530-4562